The present invention relates to a bias voltage generator circuit for the source of natural transistors which are part of MOS digital integrated circuits, with the aim of allowing the turn off of said transistors simply by grounding their gate. More in particular, the invention is intended to find a mostly advantageous application in line decoding in EPROM memories and the like.
In address decoders of EPROM memories employing natural transistors, it is not sufficient to merely ground their gates to inhibit them, since their turn off threshold is approximately -100 mV. It is thus necessary to bias their source to a positive voltage greater than the turn off threshold, and this is conventionally achieved by means of a resistor arranged in series on the source.
Production processes for natural transistors and for resistors, however, are heterogeneous. Thus the process variations entailed by this solution lead to differences which in the worst cases can cause the integrated circuits to fail their operating specifications, and in any case reduce the uniformity of characteristics from one chip to the next. Temperature and power supply variations also have different effects in the two cases, and thus cause the overall circuit to be less tolerant to such variations.